Electronic component carriers or chip carriers, as they are more commonly known, find use in numerous electronic device applications. Chip carriers protect the electronic components, or integrated circuit (IC) dies, from the external environment which might damage them. For example, carriers protect the electronic components from dust, humidity, and other damaging environmental factors. The carriers also further protect the delicate IC die during the manufacturing and testing processes.
As electronic devices such as communication devices, have become more complex, the need to minimize the board space used in implementing a design has become more critical. The challenge to the product design engineer has been to increase the number of components within the limited space of the printed circuit board. This need to maximize the use of all available space in a design has led to more creative packaging solutions in order to yield greater component densities.
Standard approaches of stacking electronic packages in order to achieve greater use of all available space in a design has led to more complex and larger packages in order to facilitate and protect the increased interconnections. This in turn has resulted in larger packages which can normally be tested only after they have been fully assembled into a stacked assembly resulting in increased manufacturing costs.
As a result, a need exists in the art for a stacked electronic component carrier which can minimize the overall volumetric size of the package, and still allow for the individual testing of each of the stacked layers before the multiple layers are united. This would minimize the manufacturing costs by isolating defective layers before final assembly of the stacked surface mount electronic component assembly is completed.